1. Field of the Invention
The invention relates to a method and apparatus of electron beam alignment, namely, a method and apparatus for aligning a semiconductor substrate with a base stage on which the substrate is placed, by employing electron beams, and more particularly to a method and apparatus of forming a circuit pattern such as a pattern for a semiconductor integrated circuit, directly onto a semiconductor substrate with electron beams.
2. Description of the Related Art
In the field of a semiconductor integrated circuit, there has been facilitated fabrication of LSI such as custom LSI and semi-custom LSI, which is to be fabricated in the small number but in the variety of kinds. As a fabrication process for fulfilling such requirement, there has been widely used electron beam radiating apparatus. The reason why the electron beam radiating apparatus is so used is as follows. The electron beam radiating apparatus does not employ a mask and a reticle unlike a projection exposure apparatus. The electron beam radiating apparatus forms a circuit pattern directly onto a semiconductor substrate in accordance with a pattern data, and hence it is possible to shorten a fabrication term by a term for making a mask or a reticle. In addition, since a cost for making a mask or reticle can be saved, the total cost for fabricating a semiconductor integrated circuit can be reduced.
FIG. 1 illustrates one of conventional electron beam radiating apparatuses. The illustrated electron beam radiating apparatus includes a main body 1 and a sample chamber 13.
The main body 1 includes an electron gun 11 for emitting electrons therefrom, an accelerating voltage source 16 for accelerating electrons emitted from the electron gun 11 to thereby form electron beams 10, and an electron mirror cylinder 12 including electromagnetic lenses, apertures and electrodes for focusing the electron beams 10 onto a certain spot, blanking the electron beams 10, directing the electron beams 10 onto a desired spot, and determining an amount of the electron beams 10 to be radiated.
The sample chamber 13 includes a support base 21 on which a semiconductor substrate 20 is placed, and an X-Y stage 15 on which the support base 21 is placed for controlling a location of the support base 21. The X-Y stage 15 is controlled its movement in X- and Y-axes directions and its rotation by a stage controller 33. The main body 1 and the sample chamber 13 are made vacuous by means of vacuum pumps 4A, 4B and 4C, and are mounted on vibration isolations 5.
Data about a circuit pattern is stored in a data memory 2. A control unit or computer 3 received data about a circuit pattern from the data memory 2, and controls the electron beams 10 and the X-Y stage 15 in accordance with the received data and predetermined parameters, to thereby form a pattern on the semiconductor substrate 21.
Until LSI is completed, formation of a pattern onto a surface of a semiconductor substrate is repeated a plurality of times. Hence, it is quite important to align a pattern with a next pattern. If a pattern was improperly aligned with a next pattern, a resultant LSI would be a defective one.
In order to avoid such misalignment, at least two alignment marks 18 are formed at a surface of the semiconductor substrate 20. The alignment marks 18 are successively scanned with the electron beams 10 controlled by means of an electron beam deflection control circuit 31. Electron beams 22 reflected from the alignment marks 18 are detected by a reflected electron detector 17, and then the reflected electron detector 17 emits signals to a signal processor 32. The signal processor 32 analyzes the received signals to thereby emit a signal indicative of a position of the alignment marks 18 to the computer 3. The electron beam deflection control circuit 31 emits a signal indicative of scanning directions of the electron beams 10 to the computer 3. The stage controller 33 emits a signal indicative of a position of the X-Y stage 15 to the computer 3.
Based on these signals emitted from the electron beam deflection control circuit 31, the signal processor 32 and the stage controller 33, the computer 3 identifies a position of the alignment marks 18, and calculates a gap in X and Y coordinates between a X-Y coordinate system associated with the X-Y stage 15 and a X-Y coordinate system associated with the semiconductor substrate 20, and further calculates an angular gap between those two X-Y coordinate systems. The computer 3 controls the stage controller 33 which in turn controls the X-Y stage 15 so as to compensate for the thus calculated gap in X and Y coordinates and the angular gap. As a result, a circuit pattern can be formed onto the semiconductor substrate 20 at a desired position.
As mentioned so far, a circuit pattern can be formed at a desired position, and a circuit pattern can be aligned with a next circuit pattern by employing alignment marks as a reference.
The above-mentioned gap in X and Y coordinates between a X-Y coordinate system associated with the X-Y stage 15 and a X-Y coordinate system associated with the semiconductor substrate 20, and the angular gap between those two X-Y coordinate systems are measured as follows. The electron beams 10 are accelerated by applying an acceleration voltage in the range of 20 kV to 50 kV thereto, and the alignment marks 18 are successively scanned with the thus accelerated electron beams 10. The electron beams 22 reflected from the alignment marks 18 are captured by the reflected electron detector 17. Then, the computer 3 determines a position of the alignment marks 18 based on the signals emitted from the reflected electron detector 17 through the signal processor 32, and subsequently calculates the above-mentioned gaps based on the thus determined position of the alignment marks 18.
As mentioned earlier, the above-mentioned conventional electron beam radiating apparatus scans at least two alignment marks with electron beams in order to determine the gap in X and Y coordinates between a X-Y coordinate system associated with the X-Y stage 15 and a X-Y coordinate system associated with the semiconductor substrate 20, and the angular gap between those two X-Y coordinate systems.
As illustrated in FIG. 1, the alignment marks 18 are spaced with one another. Hence, after the computer 3 recognizes a position of a first alignment mark by scanning with the electron beams 10, the computer 3 moves the X-Y stage 15 so that the electron beams 10 is radiated to a second alignment mark.
However, it takes a time for the X-Y stage 15 to move, and hence a wafer-processing ability of the electron beam radiating apparatus is significantly reduced. This problem is discussed in detail hereinbelow with reference to FIG. 2 partially illustrating a surface of the semiconductor substrate 20 placed on the X-Y stage 15.
Referring to FIG. 2, a semiconductor device 40 is being fabricated on the semiconductor substrate 20. The semiconductor device 40 has an X'-Y' coordinate system. On a surface of the semiconductor device 40, a first alignment mark 13A is formed at an origin, namely, at a coordinate (0, 0) of the X'-Y' coordinate system, and a second alignment mark 13B is formed at a coordinate (X1, 0) of the X'-Y' coordinate system. The X-Y stage 15 on which the semiconductor device 40 is placed has an X-Y coordinate system.
The X'-Y' coordinate system associated with the semiconductor device 40 is generally not aligned with the X-Y coordinate system associated with the X-Y stage 15 because of a dispersion in outer shapes of the semiconductor substrate 20 and a dispersion in an accuracy with which the semiconductor substrate 20 is placed on the X-Y stage 15. Hence, the alignment marks 13A and 13B are scanned with the electron beams 10 to thereby determine positions of the alignment marks 13A and 13B. Based on the thus determined positions of the alignment marks 13A and 13B, there are calculated a gap in X and Y coordinates between the X'-Y' coordinate system associated with the semiconductor device 40 and the X-Y coordinate system associated with the X-Y stage 15, and an angular gap .theta.' between the X'-Y' coordinate system and the X-Y coordinate system.
First, the computer 3 moves the X-Y stage 15 so that the first alignment mark 13A is located just in the spot of the electron beams 10. The first alignment mark 13A located at a coordinate (0, 0) in the X'-Y' coordinate system has to be located at a coordinate (0, 0) in the X-Y coordinate system. However, as mentioned above, the first alignment mark 13A is generally not located at a coordinate (0, 0) in the X-Y coordinate system. Hence, by scanning the first alignment mark 13A with the electron beams 10, there is determined a coordinate (X0', Y0') of the first alignment mark 13A in the X-Y coordinate system.
Thus, there is determined a gap in X and Y coordinates between the X'-Y' coordinate system associated with the semiconductor device 40 and the X-Y coordinate system associated with the X-Y stage 15. In order to determine the angular gap .theta.', it is necessary to determine the second alignment mark 13B.
Thus, the computer 3 moves the X-Y stage 15 so that the second alignment mark 13B is located just in the spot of the electron beams 10. The second alignment mark 13B located at a coordinate (X1, 0) in the X'-Y' coordinate system has to be located at a coordinate (X1, 0) in the X-Y coordinate system. Similarly to the first alignment mark 13A, by scanning the second alignment mark 13B with the electron beams 10, there is determined a coordinate (X1', Y1') of the second alignment mark 13B in the X-Y coordinate system.
Then, the computer 3 calculates a gap X0' in a X-axis direction between the X'-Y' coordinate system and the X-Y coordinate system, a gap Y0' in a Y-axis direction between the X'-Y' coordinate system and the X-Y coordinate system, and the angular gap .theta.'=tan.sup.-1 [(Y1'-Y0')/(X1'-X0')].
In the case illustrated in FIG. 2, two alignment marks 13A and 13B are formed per one semiconductor device. If the angular gap .theta.' was necessary to be measured with higher accuracy, three or greater alignment marks are formed at a surface of the semiconductor device 40.
If four alignment marks were formed at a surface of the semiconductor device 40, the X-Y stage 15 has to be moved three times. Though it depends on a kind of a semiconductor device, there are generally formed tens of to hundreds of semiconductor devices on a semiconductor substrate. For example, if there were formed hundred semiconductor devices on a semiconductor substrate where each of the semiconductor devices has four alignment marks, the X-Y stage 15 has to be moved three hundred times. It takes about 0.2 seconds for the X-Y stage 15 to move once. Accordingly, it takes 60 seconds for the X-Y stage to move entirely over a semiconductor substrate including hundred semiconductor devices.
As a result, a wafer processing ability of an electron beam radiating apparatus is considerably reduced, which is accompanied with a problem of an increase in fabrication costs of resultant semiconductor devices.
Apart from the above-mentioned electron beam radiating apparatus, there have been suggested similar apparatuses as follows.
Japanese Unexamined Patent Publication No. 3-194916 has suggested an apparatus for detecting a position of an alignment mark. In this apparatus, electron beams are radiated onto an alignment mark, and a position at which a current flowing in a substrate varies is detected based on secondary electrons and secondary ions emitted from the substrate and the alignment mark. A position of the alignment mark is determined based on the thus determined position and data about deflection voltage deflecting the electron beams.
Japanese Unexamined Patent Publication No. 3-201526 has suggested an apparatus for aligning a plurality of semiconductor chips with one another. In this apparatus, an alignment mark is differently positioned from others in the semiconductor chips. Positions of the alignment marks are determined by scanning the alignment marks and detecting an amount of electrons emitted from the scanned alignment marks.
Japanese Patent Publication No. 2625124, which is based on U.S. patent application Ser. No. 898,451 filed on Aug. 20, 1986 and assigned to Hewlett Packard Company, has suggested a lithography method including the steps of forming a chip registration mark on a chip, obtaining a complex parameter by moving a stage on which an integrated circuit chip is mounted and applying deflected electron beams to the chip registration mark, calculating adjustment data from the complex parameter, and applying electron beams to the integrated circuit chip through the use of the adjustment data. The complex parameter is comprised of a stage parameter which is obtained by moving the stage with the electron beams being kept stationary, and a deflection plate parameter which is obtained by deflecting the electron beams with the stage being kept stationary.
However, the above-mentioned Publications are accompanied with the above-mentioned problem. That is, a stage on which a semiconductor device to be processed has to be moved a plurality of times, which considerably reduces a wafer processing ability of the apparatus.